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Standard & Specialty Logic
Decoder & Demux
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Decoder/Demultiplexer Single 3-to-8 16-Pin SOIC N Rail
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Maximum Low Level Output Current:
Minimum Operating Supply Voltage:
Maximum High Level Output Current:
Number of Elements per Chip:
Maximum Operating Supply Voltage:
Typical Operating Supply Voltage:
0 to 70 °C
10(Max) x 4(Max) x 1.5(Max)mm
Customers Who Bought DM74ALS138M Also Bought
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.
The DM74ALS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-LOW and one active-HIGH enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications
Designed specifically for high speed:
Data transmission systems
3- to 8-line decoder incorporates 3 enable inputs to simplify cascading and/or data reception
Low power dissipationǲ3 mW typ
Switching specifications guaranteed over full temperature and V
Advanced oxide-isolated, ion-implanted Schottky TTL process
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