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Part No: 74LVX161284MTD

Low Voltage IEEE 161284 Translating Transceiver

Package Type: RAIL

Data Sheet

Life Cycle: Discontinued

Pricing & Availability for 74LVX161284MTD

1-24 :	$0.527
25-99 :	$0.485
100-249 :	$0.459
250-499 :	$0.434
500-999 :	$0.383
1000-2499 :	$0.366
2500 + :	$0.366

In Stock: 210 pcs. can ship now.



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Specifications for 74LVX161284MTD

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Manufacturer	Fairchild
Part No:	74LVX161284MTD
RoHS:	Yes
Power Supply Type:	Dual
Type:	Translating Transceiver
Maximum Data Rate:	N/A
Family:	74LVX161284
Maximum Supply Current:	70 mA
Minimum Dual Supply Voltage:	3 V
Supplier_Package:	TSSOP W
Packaging:	Rail
Pin_Count:	48
Maximum Single Supply Voltage:	N/R
Maximum Dual Supply Voltage:	3.6,5.5 V
Mounting:	Surface Mount
Minimum Single Supply Voltage:	N/R
Operating Temperature:	-40 to 85 °C
Dimension:	12.5 x 6.1 x 0.9mm

Data Sheet

74LVX161284MTDX is a different package. 0 pcs. in stock. More Info

Description for 74LVX161284MTD

The LVX161284 contains eight bidirectional data buffers and eleven control/status buffers to implement a full IEEE 1284 compliant interface. The device supports the IEEE 1284 standard and is intended to be used in an Extended Capabilities Port mode (ECP). The pinout allows for easy connection from the Peripheral (A-side) to the Host (cable side).

Outputs on the cable side can be configured to be either open drain or high drive (± 14 mA) and are connected to a separate power supply pin (V_CC-cable) to allow these outputs to be driven by a higher supply voltage than the A-side. The pull-up and pull-down series termination resistance of these outputs on the cable side is optimized to drive an external cable. In addition, all inputs (except HLH) and outputs on the cable side contain internal pull-up resistors connected to the V_CC-cable supply to provide proper termination and pull-ups for open drain mode

Product Highlights:

Supports IEEE 1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications between personal computers and printing peripherals
Translation capability allows outputs on the cable side to interface with 5V signals
All inputs have hysteresis to provide noise margin
B and Y output resistance optimized to drive external cable
B and Y outputs in high impedance mode during power down
Inputs and outputs on cable side have internal pull-up resistors
Flow-through pin configuration allows easy interface between the "Peripheral and Host"
Replaces the function of two (2) 74ACT1284 devices

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