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Standard & Specialty Logic
Counter Shift Register
Image is representational - see manufacturer’s specifications
Shift Register Single 8-Bit Serial to Parallel 14-Pin PDIP Rail
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Minimum Operating Supply Voltage:
Number of Elements per Chip:
Maximum Operating Supply Voltage:
Typical Operating Supply Voltage:
-40 to 85 °C
19.56(Max) x 6.6(Max) x 3.56(Max)mm
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The MM74HC164 utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low consumption of standard CMOS integrated circuits. It also offers speeds comparable to low power Schottky devices.
This 8-bit shift register has gated serial inputs and CLEAR. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit complete control over the incoming data. A LOW at either or both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A high level on one input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is HIGH or LOW, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse
Typical operating frequency: 50 MHz
Typical propagation delay: 19 ns (clock to Q)
Wide operating supply voltage range: 2V to 6V
Low input current: 1 µA maximum
Low quiescent supply current: 80 µA maximum (74HC Series)
Fanout of 10 LS-TTL loads
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